更新UCD-API库及文档
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@@ -1,8 +1,12 @@
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import warnings
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from ctypes import c_uint, c_uint8
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from typing import List
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from warnings import warn
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from UniTAP.libs.lib_tsi import *
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from UniTAP.dev.ports.modules.link.dp.link_status_common import DpLinkTrainingResult
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from UniTAP.libs.lib_tsi.tsi_io import PortIO
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import UniTAP.libs.lib_tsi.tsi_types as ci
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import UniTAP.libs.lib_tsi.tsi_private_types as p_ci
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from UniTAP.utils.function_wrapper import *
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from .link_tx_status import LinkDisplayPortStatusSource
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from .link_tx_config import LinkDisplayPortConfig
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@@ -34,7 +38,7 @@ class LinkDisplayPortTx:
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self.__status = LinkDisplayPortStatusSource(self.__io, self.__HW_CAPS, dpcd)
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self.__config = LinkDisplayPortConfig(self.__io, self.__HW_CAPS)
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self.__force_config = LinkDisplayPortForceConfig(self.__io, self.__HW_CAPS)
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self.__cable_info = DpCableInfo(port_io, TSI_DPTX_CABLE_ATTRIBUTES_R)
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self.__cable_info = DpCableInfo(port_io, p_ci.TSI_DPTX_CABLE_ATTRIBUTES_R)
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@property
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def status(self) -> LinkDisplayPortStatusSource:
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@@ -86,7 +90,7 @@ class LinkDisplayPortTx:
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def is_link_training_success(link: LinkDisplayPortTx):
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return link.last_lt_result() == DpLinkTrainingResult.LTR_SUCCESS
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self.__io.set(TSI_W_DPTX_COMMAND, 1, c_uint32)
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self.__io.set(ci.TSI_W_DPTX_COMMAND, 1, c_uint32)
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return function_scheduler(is_link_training_success, self, interval=0.1, timeout=5)
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@@ -97,7 +101,7 @@ class LinkDisplayPortTx:
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Returns:
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object of `DpLinkTrainingResult` type
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"""
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_, value = self.__io.get(TSI_DPTX_LT_RESULT_R, c_uint)
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_, value = self.__io.get(ci.TSI_DPTX_LT_RESULT_R, c_uint)
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return DpLinkTrainingResult(value)
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@property
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@@ -112,7 +116,7 @@ class LinkDisplayPortTx:
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warnings.warn("Scrambler Seed is not supported.")
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return 0
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return self.__io.get(TSI_DPTX_SCR_SEED, c_uint32)[1]
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return self.__io.get(ci.TSI_DPTX_SCR_SEED, c_uint32)[1]
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@scrambler_seed.setter
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def scrambler_seed(self, value: int = 0):
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@@ -126,7 +130,7 @@ class LinkDisplayPortTx:
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warnings.warn("Scrambler Seed is not supported.")
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return
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if self.config._read_lt_features().auto_seed is not None and not self.config._read_lt_features().auto_seed:
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self.__io.set(TSI_DPTX_SCR_SEED, value, c_uint32)
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self.__io.set(ci.TSI_DPTX_SCR_SEED, value, c_uint32)
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else:
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warnings.warn("AutoSeed has already enabled. Transferred value will not be written")
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@@ -160,7 +164,7 @@ class LinkDisplayPortTx:
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old_value = self.__get_override_voltage()
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old_value &= ~(3 << (stream_index * 8))
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old_value |= (value << (stream_index * 8))
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self.__io.set(TSI_DPTX_OVERRIDE_VOLTAGE_SWING, old_value, c_uint32)
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self.__io.set(ci.TSI_DPTX_OVERRIDE_VOLTAGE_SWING, old_value, c_uint32)
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def get_override_pre_emp(self, stream_index: int) -> int:
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"""
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@@ -192,7 +196,7 @@ class LinkDisplayPortTx:
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old_value = self.__get_override_pre_emp()
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old_value &= ~(3 << (stream_index * 8))
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old_value |= (value << (stream_index * 8))
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self.__io.set(TSI_DPTX_OVERRIDE_PRE_EMPHASIS, old_value, c_uint32)
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self.__io.set(ci.TSI_DPTX_OVERRIDE_PRE_EMPHASIS, old_value, c_uint32)
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@property
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def override_ffe_presets(self) -> list:
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@@ -205,7 +209,7 @@ class LinkDisplayPortTx:
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if not self.__HW_CAPS.dp2_custom_rates:
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warnings.warn("FFE presets does not support.")
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return []
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return self.__io.get(TSI_DP2TX_OUT_FFE, c_uint8, 4)[1]
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return self.__io.get(ci.TSI_DP2TX_OUT_FFE, c_uint8, 4)[1]
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@override_ffe_presets.setter
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def override_ffe_presets(self, value: List[int]):
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@@ -219,13 +223,13 @@ class LinkDisplayPortTx:
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warnings.warn("FFE presets does not support.")
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return
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new_value = value[0] | (value[0] << 8) | (value[0] << 16) | (value[0] << 32)
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self.__io.set(TSI_DP2TX_OUT_FFE, new_value)
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self.__io.set(ci.TSI_DP2TX_OUT_FFE, new_value)
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def __get_override_voltage(self) -> int:
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return self.__io.get(TSI_DPTX_OVERRIDE_VOLTAGE_SWING, c_uint32)[1]
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return self.__io.get(ci.TSI_DPTX_OVERRIDE_VOLTAGE_SWING, c_uint32)[1]
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def __get_override_pre_emp(self) -> int:
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return self.__io.get(TSI_DPTX_OVERRIDE_PRE_EMPHASIS, c_uint32)[1]
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return self.__io.get(ci.TSI_DPTX_OVERRIDE_PRE_EMPHASIS, c_uint32)[1]
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@property
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def link_pattern(self) -> DPLinkPattern:
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@@ -235,7 +239,7 @@ class LinkDisplayPortTx:
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Returns:
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object of `DPLinkPattern` type
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"""
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return DPLinkPattern(self.__io.get(TSI_DPTX_OUTPUT_PATTERN, c_uint32)[1])
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return DPLinkPattern(self.__io.get(ci.TSI_DPTX_OUTPUT_PATTERN, c_uint32)[1])
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def set_link_pattern(self, pattern: DPLinkPattern, additional_param: int = 1):
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"""
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@@ -247,16 +251,16 @@ class LinkDisplayPortTx:
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"""
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if not self.__HW_CAPS.dp2_custom_rates and pattern not in [e.value for e in DPLinkPattern]:
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raise ValueError(f"Current pattern {pattern.name} is not supported")
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self.__io.set(TSI_DPTX_OUTPUT_PATTERN, pattern.value, c_uint32)
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self.__io.set(ci.TSI_DPTX_OUTPUT_PATTERN, pattern.value, c_uint32)
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if pattern == DPLinkPattern.LinkSquarePattern:
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self.__io.set(TSI_DPTX_SQUARE_PATTERN_NUMBER, additional_param, c_uint32)
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self.__io.set(ci.TSI_DPTX_SQUARE_PATTERN_NUMBER, additional_param, c_uint32)
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def set_force_link_mode(self, link_mode: DPOutLinkMode):
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self.__io.set(TSI_DPTX_OUT_LINK_MODE, link_mode.value, c_uint32)
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self.__io.set(p_ci.TSI_DPTX_OUT_LINK_MODE, link_mode.value, c_uint32)
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def get_force_link_mode(self) -> DPOutLinkMode:
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return DPOutLinkMode(self.__io.get(TSI_DPTX_OUT_LINK_MODE, c_uint32)[1])
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return DPOutLinkMode(self.__io.get(p_ci.TSI_DPTX_OUT_LINK_MODE, c_uint32)[1])
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def cable_rx_type(self) -> CableCapabilitiesEnum:
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"""
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